New Pathways for Energy Efficient Computing Hardware
Sayeef Salahuddin gives his talk “New Pathways for Energy Efficient Computing Hardware” on Oct. 2, 2024.
EECS Colloquium
Wednesday, October 2, 2024
306 Soda Hall (HP Auditorium)
4:00 – 5:00 pm
Sayeef Salahuddin
TSMC Distinguished Professor of Electrical Engineering and Computer Sciences
UC Berkeley
Abstract
Despite ominous foretelling of a slowdown, the computational throughput has increased by orders of magnitude over the last decade. Energy efficiency is critical not only to maintain this incessant advancement, but also to ensure that electronics does not become a drag on the finite energy resources of the world. This will need a radical rethinking of the basic building blocks that constitute the electronic hardware. In this talk, I shall briefly present how exploiting physics and functional materials to augment CMOS may offer a new pathway in this context. In particular, I shall discuss logic, memory, and backend technologies where we have achieved record performance by combining new capabilities with CMOS. These examples underscore how functional augmentation of CMOS by harnessing new materials could offer opportunities that are otherwise not available through conventional means.
Biography
S. Salahuddin is the TSMC Distinguished Professor of Electrical Engineering and Computer Sciences at the University of California Berkeley. His group explores physics for low power electronic and spintronic devices. He is mostly known for the discovery of the Negative Capacitance effect that shows substantial promise for logic, memory and energy storage devices. Salahuddin received the Presidential Early Career Award for Scientist and Engineers (PECASE) from President Obama. In addition, he received the IEEE Andrew S Grove Award, a technical field award given by IEEE for ‘For outstanding contributions to solid-state devices and technology’.